pc4200 rambus

[borat]

with the forthcoming pc4200 rambus which is basically dual channel on a single rimm can you put two of these modules in a dual channel configuration ie creting a sort of quad chanel to acheive 8.4 gig a sec bandwidth?would the intel 850e support this?

[EvilDonnyboy]

No. You'll just be adding more ram, not more bandwidth. The idea is similar to DDR dimms.

[Wombat]

I can't find any information about what you're referring to. Could you post a link, borat?

EDB, what are you saying? DDR's entire purpose is bandwidth improvement.

[borat]

nothing to link to really wombat just what a few guys have been saying here :

http://www.tekforums.co.uk:81/posts.php?threadId=14742

and samsungs upcoming chips here

http://www.ocworkbench.com/index.stm

half way down the page at present.
it really is a wasted opportunity that you cannot dual channel 2 pc4200 rimms as dual channel ddr will soon be out with bandwidth up to 6.4 gig a sec and i dont like ddr rambus is technically better in my opinion and 2 of these could yeaild 8.4gig a sec *drool*

[az]

This is basically really the same as two single-channel RAMBUS dimms in a dual-channel configuration... I think the 850 does support this, but only one dual-channel channel

AZ

[Wombat]

I like DDR as a better technology than Rambus. I think you're seeing why. With SDRAM, if you need more bandwidth, you parallelize it and get a wider bus. Rambus, being a serial technology, doesn't adapt well to that. The only thing Rambus has right is LVD signalling, which should start showing up in other RAM before too long.

[EvilDonnyboy]

As I'm sure you already know, 184pin Rimms had previously had to be placed in pairs on a P4 system. Thats because they required "dual Channels" to double bandwidth.

Rambus has created a new standard wth 232 pins. These rimms already have dual-channels built-in and do not need to be placed in pairs. One of these new rimms have the same bandwidth as a pair of old 184pin rimm.

But the quesiton asked orginally in this thread was if these new 232pin rimms could be made put into quad channels when placed in pairs. Answer plain and simple is no.

Also, rambus has created new names that represent bandwidth available instead of clock speed. PC800 is now "PC3200" although it still runs at 800mhz albeight with dual-channels built in. PC1033 is now PC4200.

The idea of only needing one rimm is similar to only needing one DDR dimm.

[Wombat]

...not that their old names indicated clock speed anyway...

[Pace]

Yeah, I'm surprised RAMBUS didn't use the bandwidth numbers to begin with - it annoyed me how RAM suddenly went from being PC66/100/133 to PC800 vs PC2700! Surely RAMBUS should've known to market it as PC3200 to begin with

But now we have to put up with bus speeds, dividers for AGP/PCI, async memory and quad-pumped busses. Oh to return to BX. 100MHz bus. 100MHz memory

And, as EDB said, interleaving these "DualChan on a RIMM" ain't possible.

Incidentally, I believe RAMBUS is DDR anyway. What I don't get is this DualChannel. Isn't this effectively a 2-bit parallel bus? And RAMBUS is 16bit - what does that refer to? I'm just curious what way the RAM war will go. It looks like RAMBUS will slowly ease themselves out of the market thanks to their annoying practices, but is there a future in the technology?

Does DualChan operate on an alternating clock? Basically, can anyone explain RAMBUS I read an article a while back on Anandtech I believe, but long since forgotten. It was thanks to dZeus that I got thinking about it again, as I was strongly looking to get some PC1066 for the highest performing P4 system. But it won't be much good if I can't buy RAMBUS later for an upgrade.

P.

[Wombat]

Almost the only tech worth salvaging is the LVD signalling. It's a common, simple idea used in tons of communication, but it's lacking in current SDRAM. Otherwise Rambus is a wasteful, high-latency, bitch-to-implement, piece of *@!#

[Pace]

Isn't RAMBUS' "simplicity" what makes it so easy to ramp up the clock? (ie the 16bit versus 64bit) Or is it more down to LVD as you say?

[Wombat]

Ramping up that clock is hardly "easy." Also, with Rambus running 2x16-bits at 8x100 MHz, is that any different (first-order) from running 64 bits at 2x100MHz? It's also much easier to have more SDRAM channels added than Rambus channels (yes, more traces, but less engineering hassle). Rambus as single-chips or so (like in game consoles) can be fairly effective, but putting it into RIMMs, yech.

[Pace]

Yeah, I know that the high clock versus the low bit rate balanced itself out, but I thought the RAMBUS tech was built for clock ramping. Thanks for the explanation anyway

(nb though, is running 2x16@800 not twice as good as 64@200? - I guess I could not be thinking at 2am though)

P signing off...

[Wombat]

Yup, you're right, I was rushed on that one. Part of me was thinking 64-bit bus, part 128-bit bus.
Built for ramping? On a certain scale, yeah, but not across the traces of a noisy $100 motherboard.

[borat]

i thought that due to being a serial architecture rambus had some kind of in built advantage over ddr something refered to as "leaking" i thought i heard a while back that ddr suffered from but rambus didnt, i have little technical knowledge on how the products work its just what i remember reading somewhere.