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update SAN FRANCISCO--Intel has built a prototype of a processor with 80 cores that can perform a trillion floating-point operations per second.
CEO Paul Otellini held up a silicon wafer with the prototype chips before several thousand attendees at the Intel Developer Forum here Tuesday. The chips are capable of exchanging data at a terabyte a second, Otellini said during a keynote speech. The company hopes to have these chips ready for commercial production within a five-year window.
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But the ultimate goal, as envisioned by Intel's terascale research prototype, is to enable a trillion floating-point operations per second--a teraflop--on a single chip. Ten years ago, the ASCI Red supercomputer at Sandia National Laboratories became the first supercomputer to deliver 1 teraflop using 4,510 computing nodes.
Intel's prototype uses 80 floating-point cores, each running at 3.16GHz, Justin Rattner, Intel's chief technology officer, said in a speech following Otellini's address. In order to move data in between individual cores and into memory, the company plans to use an on-chip interconnect fabric and stacked SRAM (static RAM) chips attached directly to the bottom of the chip, he said.
Intel's work on silicon photonics, including its recent announcement of a silicon laser, could help contribute toward the core-to-core connection challenge. Rattner and professor John Bowers of the University of California at Santa Barbara demonstrated Intel's newest breakthrough model of silicon laser, which was constructed using conventional techniques that are better suited to volume manufacturing than older iterations of the laser.
Many of the architectural nuances of the 80-core chip can be traced back to earlier research breakthroughs announced at previous IDFs. Connecting chips directly to each other through tiny wires is called Through Silicon Vias, which Intel discussed in 2005. TSV will give the chip an aggregate memory bandwidth of 1 terabyte per second.
Intel, meanwhile, began to discuss replacing wires with optical technology in computers and chips in 2001 and has come out with several experimental parts for enabling lasers and optical technology to replace wires.
The same year, Intel began to warn about the dangers of heat dissipation in processors. One of the solutions, the company said at the time, lay in producing chips with multiple cores.
CEO Paul Otellini held up a silicon wafer with the prototype chips before several thousand attendees at the Intel Developer Forum here Tuesday. The chips are capable of exchanging data at a terabyte a second, Otellini said during a keynote speech. The company hopes to have these chips ready for commercial production within a five-year window.
>
But the ultimate goal, as envisioned by Intel's terascale research prototype, is to enable a trillion floating-point operations per second--a teraflop--on a single chip. Ten years ago, the ASCI Red supercomputer at Sandia National Laboratories became the first supercomputer to deliver 1 teraflop using 4,510 computing nodes.
Intel's prototype uses 80 floating-point cores, each running at 3.16GHz, Justin Rattner, Intel's chief technology officer, said in a speech following Otellini's address. In order to move data in between individual cores and into memory, the company plans to use an on-chip interconnect fabric and stacked SRAM (static RAM) chips attached directly to the bottom of the chip, he said.
Intel's work on silicon photonics, including its recent announcement of a silicon laser, could help contribute toward the core-to-core connection challenge. Rattner and professor John Bowers of the University of California at Santa Barbara demonstrated Intel's newest breakthrough model of silicon laser, which was constructed using conventional techniques that are better suited to volume manufacturing than older iterations of the laser.
Many of the architectural nuances of the 80-core chip can be traced back to earlier research breakthroughs announced at previous IDFs. Connecting chips directly to each other through tiny wires is called Through Silicon Vias, which Intel discussed in 2005. TSV will give the chip an aggregate memory bandwidth of 1 terabyte per second.
Intel, meanwhile, began to discuss replacing wires with optical technology in computers and chips in 2001 and has come out with several experimental parts for enabling lasers and optical technology to replace wires.
The same year, Intel began to warn about the dangers of heat dissipation in processors. One of the solutions, the company said at the time, lay in producing chips with multiple cores.
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