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REQUEST: G400 register level programmers to assist

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  • REQUEST: G400 register level programmers to assist

    I am looking for someone who knows the G400 at the hardware register level, to look over the values for a particular display mode I wish to switch the G400 into and confirm or correct values where they are wrong, and then to look at the values for drawing a line in PowerMode too, a bit later on.

    If someone can assist I would be, well more than grateful since it is a frustrating experience to say the least and many a morning has seen the dawn happen whilst trying in vain to get the code to work!

    Just to fill you in, I am programming in assembler A386, from MSDOS, with a protected mode switching routine I have written that definitely works, it is just the G400 mode switch code and/or drawing code that does not once in protected mode.

    Hear from you shortly

    Nicole
    ---
    __________________________________________________ _________________________
    Nicole Kaiyan
    Adelaide, AUSTRALIA

    email: nk@vygotski.philosophy.adelaide.edu.au


    Begin forwarded notes:

    Desired display mode is Standard Vesa Mode 1024 x 768 at 60Hz, which according to my notes, has values as follows:
    * pixel clock freq.(kHz) 65000
    * width 1024
    * h-sync pulse start 1048
    * h-sync pulse end 1184
    * total pixels in line 1344
    * height 768
    * v-sync pulse start 771
    * v-sync pulse end 777
    * total lines in frame 806
    * sync polarity 0

    Now based on the supplied values and having looked over the G400 specs many times I arrive at the following values:


    register decimal hex notes
    __________________________________________________ ____________________________
    vtotal 804 324h 806 lines - 2
    vdispend 767 2FFh 768 lines - 1
    vblkstr 767 2FFh 768 - 1
    vblkend 00100101-base2 804(vtotal)+1 = 805(325h) AND FFh
    vsyncstr 771 303h
    vsyncend 1001-base2 777(309h) AND 0Fh

    htotal 163 A3h 1344 pixels/8=168 characters - 5
    hdispend 127 7Fh 1024 displayed pixels/8=128 - 1
    hblkstr 127 7Fh 1024/8 = 128 - 1
    hblkend 0100111-base2 163(htotal)+4 = 167(A7h) AND 3Fh
    hsyncstr 131 83h 1048/8 = 131
    hsyncend 10100-base2 1184 pixels/8 = 148(94h) AND 1Fh

    startadd 0
    offset 256 100h 1024pixels*32bpp*1/128
    maxscan 0 1X horizontal zoom
    linecomp 768 300h

    hsyncpol 0 based on 768 lines
    vsyncpol 0 based on 768 lines

    hsyncdel 00
    hdispskew 00
    bytepan 00
    conv2t4 0
    dotclkrt 0
    dword 0
    wbmode 1
    hsyncsel 0
    selrowscan 1
    cms 1
    maxhipri 010 (2)
    hiprilvl 101 (5)

    mgamode 1
    csyncen 0
    scale 011 32-bits/pixel
    interlace 0

    depth 100 32bits/pixel Direct Color
    clksel 11
    pixclksl 01

    pixpllm 2 PIXPLLM/N/P (C register set)
    pixplln 28 65.250MHz
    pixpllp 3 = 27MHz * [28+1] / [[2+1][3+1]]
    pixplls 0

    syspllm 2 SYSPLLM/N/P
    sysplln 27 252MHz
    syspllp 0 = 27MHz * [27+1] / [[2+1][0+1]]
    sysplls 3

    gclksel 01 SYSPLL 252MHz
    gclkdiv 011 divide by 2 ---> GCLK 126MHz
    gclkdcyc 0000 none
    mclksel 01 SYSPLL 252MHz
    mclkdiv 100 divide by 3/2 ---> MCLK 168MHz
    mclkdcyc 1011 duty cycle correction(?)
    wclksel 01 SYSPLL 252MHz
    wclkdiv 011 divide by 2 ---> WCLK 126MHz
    wclkdcyc 0000 none
    __________________________________________________ ____________________________
    Notes:

    vblkend [8-bit] = (vblkstr - 1 + vblk signal width) AND FFh
    = (vtotal + 1) AND FFh
    vsyncend [4-bit] = (vsyncstr + vsync signal width) AND 0Fh
    hblkend [7-bit] = (hblkstr - 1 + hblk signal width) AND 3Fh
    = (htotal + 4) AND 3Fh(?)
    hsyncend [5-bit] = (hsyncstr - 1 + hsync signal width) AND 1Fh

    htotal > 0
    vtotal > 0
    htotal > hdispend
    htotal - bytepan[00] + 2 > hdispend
    hsyncstr > hdispend + 2
    hblkend > hsyncstr + 1

    htotal + 5 = hblkend + 1
    hdispend + 1 = hblkstr + 1

    VESA standard mode 1024 x 768 at 60Hz:
    - Vertical
    total 806
    display end 768
    blank start 768
    sync start 771
    sync end 777
    blank end 805

    - Horizontal
    total 1344
    display end 1024
    blank start 1024
    sync start 1048
    sync end 1184
    blank end 1348

    blanking signal width is derived
    horizontal = htotal + 4 - hblkstr = 1344+4-1024= 324 (or 40 1/2 chars)
    vertical = vtotal - 1 - vblkstr = 806-1-768 = 37

    sync signal width is defined
    horizontal 136 pixels (or 17 chars)
    vertical 6 pixels
    __________________________________________________ ____________________________

    Further notes:

    All I seem to get are vertical stripes, about 7 of them regularly spaced across the screen, the monitor appears to have picked up a stable signal but I cannot get anything other than this!
    Nicole KAIYAN
    Adelaide, AUSTRALIA

    email: nicolek@softhome.net

  • #2
    vtotal 804 324h 806 lines - 2
    vdispend 767 2FFh 768 lines - 1
    ...
    Well, this is probably not going to be very helpful, but just in case you meant this literally... You do realize that all these registers are only 8 bits wide? (You can't write 324h to the vtotal register, or you'll end up, not with 806 lines, but with only 38.)

    Comment


    • #3
      Nicole, gbm's isp has been offline since last week and says he'll help first chance he gets
      "Be who you are and say what you feel, because those who mind don't matter, and those who matter don't mind." -- Dr. Seuss

      "Always do good. It will gratify some and astonish the rest." ~Mark Twain

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