Rumour: G400 already T&L capable ??

[GT98]

My question is how is it gonna take Matrox to get these G450's out the door . After waiting the whole summer and the better part of the fall to get MAX, I wonder at times..

Scott


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Abit BH6 with a P3-450@558,128mb RAM,G400 MAX,SB Live!, Optiquest V95 19in montor, Asus 40x CD-ROM, Aopen 5x DVD-ROM, 2x CDR, WD 13.6 GB HD,SupraMax 56k modem

[Scytale]

A rumour about a rumour... pretty impressive Ant. Looks like we've accepted that there will be a G450, and now we're pretty sure that it will do T&L

[paulcs]

Uh-oh. I just noticed Ant's been messing with the member classifications again.

Paul
paulcs@flashcom.net

[Mark F]

gbm,
Tag rezumish (as close as I could get phoneticly)

Mark F.

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OH NO, my retractable cup holder swallowed a CD

[Jorden]

Makes you wonder when we become maxi Murcers, hmm, Paul?

[This message has been edited by Jorden (edited 16 December 1999).]

[Borg]

well...chihuang..I was G200 user & you are right about ANTIALIAS..or how ever...but men, T&L is lots more then just a 3D function its complex mathematical calculations so the HARDWARE must be designed for that..besides ANITIALIAS didnt preform well with G200..if you remember, like ANISOTROPIC FILTERING with G400...so Im still dont belive in T&L hidden function in G400 chip...(no offence & no flaming PLEEZZZ !)


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PIII450@465,P2b,128mb,Matrox Mill-G400 32SH,SB.Live !(value),IntelliMouse Explorer (yahoooo! no fu..hm hm. ball any more ...)

[kjliew]

All right, guys. Rather than debating on such matter, why don't we refer to the chip specification. This is what it says:

"...These are the 64 multi-purpose WARP registers (WR0, WR1,...., WR63). They can represent an IEEE single precision floating point number, a fixed point 32-bit integer, two 16-bit words or four bytes. It is up to the software to define what to put i these registers and how the microcode will interpret them..."

At first, I was rather confused when I first saw this. The WARP engine is meant for triangle setup which is integer intensive, but Matrox actually built it with floating point capabilities. And, the WARP is FULLY PROGRAMMABLE.

I am no 3D programmer, I don't know whether single precision IEEE FP will be sufficient for T&L. I have long been suspecting the capability of G200/G400 to do T&L if the WARP can be programmed to do so. Well, it still depend on whether the whole WARP architecture is optimized for T&L processing. If Matrox only do T&L in the so-called new "G450", then probably they are optimizing the WARP for T&L processing.

Just my $0.02

[alessandro]

I just realised that i'm a Murcer... not a Murcette or Mini Murcer any more YUUPPII

[Borg]

Welcome to BIG club alessandro,....will there be something like MAXMurcer or something ????


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PIII450@465,P2b,128mb,Matrox Mill-G400 32SH,SB.Live !(value),IntelliMouse Explorer (yahoooo! no fu..hm hm. ball any more ...)

[Rob M.]

"One of the things I was told way back about the G400 chip was that it had a modular design allowing extras to be bolted on at a later date"

I dunno about T&L in current G400's but it sounds like adding T&L to the g400 could be like adding MMX to the pentium.

BTW, why would matrox include a WARP engine if they're not using it (for something other than T&L) already?

[cjolley]

Paulcs
The tech term for "Render Subjects Nude" is Hardware T&A!

chuck

[Himself]

If you think about all the people you see everyday, would you really want to see them all nude? *Shudder*

[Mike H]

It seems to me that there may be room to add more functions to the warp engine. I used MGA Tweak to underclock it to 99Mhz and the performance did not drop. Any thoughts on this?

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Mike H.

AMD Athlon 500 @ 750 (214*3.5) Asus K7M Rev. 1.04 Bios 12-9-99 128 Meg Corsair PC133 Matrox G-400 Dualhead 32MB 5.41 Drivers SB Live! Full Retail Western Digital Caviar ATA66 AC313000RTL

I can change the multiplier and voltage on your Athlon Processor!
mikehdft@msn.com

[Nuno]

So, let´s suppose the WARP registers are programmed to do the T&L floating point stuff. And what would calculate the triangle setup integer stuff, the cpu? Or can you have registers performing integer calculations and other performing FP? And are the modes (Int/FP) interchangeable (like the MMX, it was a fiasco because when using MMX, the change to x86 FPU mode costs a huge performance hit)?

This is fun as a mere theoretical discussion, but I still doubt that technical WARP statement implies that the G-x00 chips could do T&L.

[Stil]

kjliew: Although you are correct in that the WARP processors can be programmed to do many useful things, T&L is not one of them.

In order to transform a list of vertices, you first need some cache to store them from frame to frame. No such cache exists on the G200 or the G400. Although the WARP could possibly be programmed to do T&L, there is nowhere to store the vertices.