parhelia voltage mod finished

[Pace]

No, you assume that everyone knows the risks. Someone who might've unlocked an Athlon might think this is just the same. It's been stated that the lifespans of this 'mod' is measured in months, not years. I've yet to have anything that's overclocked die on me.

P.

[thop]

K-III rather seems like an o/c veteran and pro to me.
Oh and maybe he fries it just in time for the P8x or P2

[Wombat]

Originally posted by thop
[B]K-III rather seems like an o/c veteran and pro to me./B]

Not me, not if he can't even remember 486s.

[Wulfman]

Originally posted by Wombat
Not me, not if he can't even remember 486s.

that could also make him too old for o/c.

mfg
wulfman

[Sasq]

Naa never too old, I can remember upping the clock on my 8088 chip

[Stringy]

So then if I get this, you and others on this thread know better than everyone else??

From the start of the whole Vmod issue there have been many nah-sayers here...
First it couldn't be done, "Period."
Then it might be possible, but you'd fry the chip,
now that its been done, and gains made from it, significant gains...
Now we get the line the chip won't last...

Seems extremely familar to the arguements again O/C'ing way back when...
Add the new twist that now others are "protecting" those that don't know any better and attempt a mod they don't understand and the off chance they fry it, and further that they complain about it....

there's an Awful amount of suppositions....

The warnings are here, this thread is as dead as it can be, and those that have done this mod are not posting anymore, except K6III...

I wish you the best of luck K6III and look forward to further updates on this mod, good and bad...


Craig

[Stringy]

Originally posted by Pace
. It's been stated that the lifespans of this 'mod' is measured in months, not years. I've yet to have anything that's overclocked die on me.

I must have missed that part, could you point me to where you read this or where it was posted...

thanks
Craig

[Wombat]

Originally posted by Stringy
So then if I get this, you and others on this thread know better than everyone else??

Yes, I know better than many. Not from the OCing experience (which is pretty plentiful) as much as my real-life, professional processor design & testing experience. I can not only say <I>that</I> damage will occur, but I can illustrate how, on a molecular level. Also, there are many <B>very</B> experienced people on here, such as Greebe.

From the start of the whole Vmod issue there have been many nah-sayers here...
First it couldn't be done, "Period."
Then it might be possible, but you'd fry the chip,
now that its been done, and gains made from it, significant gains...
Now we get the line the chip won't last...

Let's see... I only remember knowledgable people saying that it <I>shouldn't</I> be done. Also, saying that you would fry the chip, and saying that it won't last, are the same thing. I mean, right now, I can practically hear the gate substrate degenerating.

there's an Awful amount of suppositions....

Yes, you seem to be supposing. I am using my knowledge as a trained expert.

Oh, and anybody else here raise their hand if they've ever used a compressor w/ heat exchanger system to control a die temperature.

[Stringy]

Wombat, Your expertise and experience are great tools, and its a pleasure to read and learn from those that have the knowledge and are willing to share it...
I've never refered to anyone not knowing this field, but maybe I wasn't clear...

As far as this goes, just as I can't say the Chip can take more or even what the tolerance is, nor can you, since niether of us were involved in or prevy to the details of the P...
you would probably be more adept at making an educated guess, at best, as to the tolerance range...

I've kept to the same point, it's not that the warnings are unfounded, its that there is so much that it makes it hard to find and follow this, thus making it un-inviting for those doing this to post...

whichever... this is already dead until someone posts more info about it, which is less likely given this forums response to the 2 threads already bloated with warnings..


Craig

[K6-III]

Wombat, since you appear to be in the know, I would greatly appreciate it, as would the rest of this board, exaclty which problems we can expect if the voltmod is perfomed...

I've heard so many you can't do that statments that didn't live upto anything that I'm cautious in trusting them....

Now if you could explain what we can expect to fail and why, that would definitely be reason enough...

[Wombat]

As far as this goes, just as I can't say the Chip can take more or even what the tolerance is, nor can you, since niether of us were involved in or prevy to the details of the P...

We <I>are</I> privy to those details. We know who fabbed it, and we know what process they used. Those are the dominant factors in this type of design.

When you throw more voltage at CMOS, you threaten the gate substrate. Think of a CMOS gate kind of like this:

Fill a ballon with water, and the water is has some iron "dust" in it. Put 3 plates in a row on the balloon, 1, 2, 3, just like that. 1 & 3 want to talk to each other, but they aren't connected to each other directly, they're just near each other on the balloon surface..

Now, we'll make plate 2 an electro-magnet. If you want 1 & 3 to talk to each other, you turn the magnet on - plate two will magnetize, and the iron filings in the water will concentrate on the inside of the ballon, near plate two. This is good enough to form the "bridge" for 1 & 3 to talk to each other. Turn off the magnet, and the link goes away.

But, you think the connection is too slow...so you provide more power to the magnet(2) when you turn it on. Now, the iron attracted more strongly, so the bridge forms faster (nifty! higher clock speed work now!). You provide even more power, but now you have a problem: the iron moves so fast, that when it crashes into the balloon some of it gets stuck in the rubber skin permanently. You can turn the magnet off, but the connection is still kinda there between 1 & 3 - forever. Congratulations, you've busted the ballon gate.

CMOS works a lot like that, except that the "balloon's" skin is only about 5 atoms thick these days.


There are other things, like wire deterioration, that happen as well. Just remember that in general, things are a function of Voltage-squared in there. So, 10% more voltage means that things age 21% faster, and 20% more voltage means you're aging 44% faster.

[K6-III]

What I'm curious about is why raising voltages is only a problem with the Parhelia. The GF4, R8500, etc are OK

AMD and Intel CPU's are OK, to a point....

What I'm asking is what makes the Parhelia different from anything else. The R9700 appears to survive voltmodding with appropriate cooling, despite having more transistors than P and being also build on .15micron....

[Wombat]

Well, in my above example, the gate can be very different depending on who spec'ed the process. Size of the gate, the chemicals used, thickness, doping ratios, if you use SOI.....

[Marshmallowman]

Don't manufacueres usualy factor in 5-10% margin for operting voltages?.

Is the Parhelia so borderline that a 10% tweak would do that much damage?

[funky-d-munky]

So Wambat are you saying Matrox's process is different than Nvidia, Ati, Intel, Amd ?
funky