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  • Parhelia Informations?

    Hey, I just read a post by Haig

    (http://forum.matrox.com/mgaforum/For...ML/001077.html), and he wrote in Italics "I believe that tile rendering is the future…". I guess that means that Parhelia could use such an approach… and I think it would be REALLY great; take the Kyro 2 for example: it uses 128-bits SDRAM (running at 166 MHz if I remember correctly), and only has 2 pixel rendring pipelines and has a clockspeed between 143 and 175 MHz. This means that it has the same memory bandwidth as the GeForce 2 MX, no T&L unit and half of it's texel rendering power, yet it performs better in most tests... Imaging a chip with 4 (or eight like the R300) pixel pipelines, 2 texture units, a fast T&L unit (and 2 vertex shader units + 2 pixel shader units), fast 256-bits memory architecture . . . and able to do tile rendering... it would effectively be twice as fast as a GeForce 4 Ti... add DualHead, VCQ³ and quality DVD playback, and you've got some pretty nice chip...



    And now, to change the subject (and to try to forget the deaths of 4 canadian soldiers caused by a wrong american bombardment yesterday), here's a funny true story:


    October 1995 (verified with Canada's Bureau du commerce maritime)


    Transcript of communications between a US Navy convoy and Canadian authorities, a hundred miles from Newfoundland :


    - US Navy: To unidentified ship: please change your course 15° North to avoid collision. over.

    - Canadians: Negative. Please change your course 15° South to avoid collision. over.

    - US Navy: Captain X speaking. I repeat, change your course 15° North to avoid collision. over.

    - Canadians: Negative. You'll have to reroute, please. over.

    - US Navy: Listen here: I'm captain of the USS LINCOLN carrier, which is the second largest ship in the US Navy. My ship is accompanied by an escort of 6 vessels. I'm politly askling you to reroute 15° north. If you do not comply, we will have to take actions to ensure the safety of our passage. over.

    - Canadians: I am a civilian and I work in a lighthouse. over.

    - US Navy: [nothing].
    Last edited by frankymail; 18 April 2002, 08:35.
    What was necessary was done yesterday;
    We're currently working on the impossible;
    For miracles, we ask for a 24 hours notice ...

    (Workstation)
    - Intel - Xeon X3210 @ 3.2 GHz on Asus P5E
    - 2x OCZ Gold DDR2-800 1 GB
    - ATI Radeon HD2900PRO & Matrox Millennium G550 PCIe
    - 2x Seagate B.11 500 GB GB SATA
    - ATI TV-Wonder 550 PCI-E
    (Server)
    - Intel Core 2 Duo E6400 @ 2.66 GHz on Asus P5L-MX
    - 2x Crucial DDR2-667 1GB
    - ATI X1900 XTX 512 MB
    - 2x Maxtor D.10 200 GB SATA

  • #2
    ROFLMAO!
    According to the latest official figures, 43% of all statistics are totally worthless...

    Comment


    • #3
      Haig was just quoting Whiplash.

      <i>"Tile renderin'? Where we are going, we dont need tile renderin' !"</i>

      Comment


      • #4
        actually the sentence in italics is just a quote from one of the above posts. his opinion on tile based rendering is just under this quote.

        personally, i don not think the parhelia will not be based on tile based rendering. look at the Kyro2 in 3D Apps like Maya, 3DMax etc, - worse than a TNT2. and the users of these apps are potentional parhelia customers. but then i might be all wrong
        no matrox, no matroxusers.

        Comment


        • #5
          Darn, you're right; Haig didn't seems very enthusiast about it after all… yet, I don't know why; tile-based rendering does save an incrdible amount of memory bandwidth, which is the primary performance limitation today…
          What was necessary was done yesterday;
          We're currently working on the impossible;
          For miracles, we ask for a 24 hours notice ...

          (Workstation)
          - Intel - Xeon X3210 @ 3.2 GHz on Asus P5E
          - 2x OCZ Gold DDR2-800 1 GB
          - ATI Radeon HD2900PRO & Matrox Millennium G550 PCIe
          - 2x Seagate B.11 500 GB GB SATA
          - ATI TV-Wonder 550 PCI-E
          (Server)
          - Intel Core 2 Duo E6400 @ 2.66 GHz on Asus P5L-MX
          - 2x Crucial DDR2-667 1GB
          - ATI X1900 XTX 512 MB
          - 2x Maxtor D.10 200 GB SATA

          Comment


          • #6
            Originally posted by frankymail
            Darn, you're right; Haig didn't seems very enthusiast about it after all… yet, I don't know why; tile-based rendering does save an incrdible amount of memory bandwidth, which is the primary performance limitation today…
            but if you have a <I>massive</I> amount of memory bandwidth available, why bother trying to save it?

            Comment


            • #7
              even higher performances?
              What was necessary was done yesterday;
              We're currently working on the impossible;
              For miracles, we ask for a 24 hours notice ...

              (Workstation)
              - Intel - Xeon X3210 @ 3.2 GHz on Asus P5E
              - 2x OCZ Gold DDR2-800 1 GB
              - ATI Radeon HD2900PRO & Matrox Millennium G550 PCIe
              - 2x Seagate B.11 500 GB GB SATA
              - ATI TV-Wonder 550 PCI-E
              (Server)
              - Intel Core 2 Duo E6400 @ 2.66 GHz on Asus P5L-MX
              - 2x Crucial DDR2-667 1GB
              - ATI X1900 XTX 512 MB
              - 2x Maxtor D.10 200 GB SATA

              Comment


              • #8
                Tile based rendering was developed for the consumer PC market, not the high end OpenGL market. By nature, PC cards are fillrate limited, as such, TBR saves bandwidth and increases effective fillrate. In contrast, professoinal workstation cards are geometry limited. This means using TBR is counter productive as it trades geometry for fillrate. (There are other tiling algorithms which does not sacrifice geometry speed but are currently not in the market)

                Basically, since Matrox is aiming for the high end CAD market, their chip should be orientated around high geometry output as well as fillrate. If a TBR mechanism was implemented, they'd create a very fast rasterizer only to be limited by geometry.

                Comment


                • #9
                  I still want to see the KyroII SE. Supposedly pretty cool.

                  Comment


                  • #10
                    Originally posted by SteveC

                    but if you have a <I>massive</I> amount of memory bandwidth available, why bother trying to save it?
                    To get even _more_ effective bandwidth? *evil grin*
                    Someday, we'll look back on this, laugh nervously and change the subject.

                    Comment

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