The russians cant listen to NDAs either.

[Slougi]

It seems to affect only the 2d images that are drawn directly to screen, like HUD objects. I think it should be a driver issue.

[MaxMax]

well, priceing of Parhelia:So, shortly will be àíîíñèðîâàíû 64, 128 and 256 MB of a card(map) on base Parhelia-512, the grown-up in a ruler a payment will cost about 500 $, for a payment about 128 MB of memory you pay already about 400 $. All cards(maps) are supplied high-grade 256 bats with the trunk of memory - a difference only in speed of work of memory and its(her) volume.

[MaxMax]

and here is something that makes me think:
It Is interesting, that the accelerator can be named only "in part" DX9 compatible. It is known, that Parhelia-512 can execute topmost øåéäåðû the second generation. But, thus Parhelia-512 does not correspond(meet) to the second generation ïèêñåëüíûõ øåéäåðîâ! The maximum, on what the chip is capable in this question - version 1.3, i.e. up to 4 structures for pass. Let's look at the detailed circuit ïèêñåëüíûõ conveyors of the chip:

so parhelia is only partly "DX9" compatible, because the lack of Pixelshaders 2.0, and the problem seems that when more then 5 textures should be rendered, parhelia has to switch the 4 pixelshaders * 5 textures each into a 2 pixelshader * 10 textures each kind of mode so it could only work with half of the pixelshaders per clock .... and somewhere else it says:
Tests of engineering samples for some more very crude drivers show only 20. 30 % advantage Parhelia-512 above NVIDIA GeForce 4 Ti4600. Even under condition of successful òþíèíãà the software, the double superiority hardly becomes possible(probable). One and a half time - the top limit. It is obvious, that at essential cost of cards(maps) on the basis of new GPU from Matrox, usual consumers can buy them for the sake of quality and unique opportunities, but not speeds.

that sounds like matrox will only have the speed crown for 3-6 months (its like with the G400MAX release, it ruled from march til autumn when Geforce 1 blew it away) until NV30 and R300 are finished, but who wants to have >100fps all the time with "NVblurring your eyes" )

[James Crowson]

English translation of Parhelia preview

I've put an English translation of iXBT's Parhelia preview up here: http://jc.planetpei.com/parhelia/

Enjoy...

[otlg22]

Did anyone notice the 'Glyph Antialiasing' Unit on the block diagram.. finally font smooth/clear type done in hard with no performance hit...

PS. After having lurked here for nearly 4 years I figured I finally had to post something

[MaxMax]

yes, this parhelia is so much feature rich that you do not need another card in the next 3 years....

[midnight]

3 years?

Maybe if you are not a hardcore gamer but I plan on buying the die shrinks of this gpu when it comes out as well.

[otlg22]

I want more details on the primitive engine.. Particularly what's up with the culling portion of that... that could mean a lot of different things..

[TdB]

if i read this correctly it wil NOT have any bandwith-saving-tech at all.

[otlg22]

maybe, maybe not.. it's hard to tell.. it could be standard culling, or they may have something more creative.. They seem to be generating a lot of 'extra' information to drive the 16x edge antialiasing..

[edit]
Further note.. the pixel shader looks a little unimpressive.. but that said, the way they have set it up they could probably easily widen it in the future. Very nice the way the units can cascade together like that.. very smart for future scalability.

[Toastywheatman]

3fps: most likely obtained on an emulator

Do not worry about the 3 fps figure, it is likely that the the screenshot was obtained not on a Parhelia but on a FPGA chip emulating the Parhelia. For instance, IKOS is one company which designs such FPGAs (http://www.ikos.com/). The screenshot was probably obtained after the Parhelia had taped out but before the first samples arrived back at the labs. Why Matrox didn't go back and update their screenshots with working Parhelia silicon is anybody's guess. The "image quality" is exactly the same though and that's what they are trying to convey in that image, not performance.


Now, wrt to 3D, here's what I'm seeing:

FEATURES:
- Vertex Shader 2.0 (thus full DX9 VS support)
. - support for Displacement mapping (VS 2.0)
. - DX9 level support for N-patches (VS 2.0 ?)
- Pixel Shader 1.3 (incomplete DX9 PS support)
- upto 16x adaptive MSAA. I could see no indication of any SSAA technique. I also can't read Russian

SPECS:
- 4 vertex engines (versus 2 on GF4 and ~2 on R8500)
. - GF4 tri rate is ~125mil tri/sec, so Parhelia is likely ~250-275
- 4 pixel shader pipelines (same for GF4 and R8500)
- Pixel fillrate of 1.4 gigapixels/sec (vs 1.3 for GF4 and 1.2 for R8500, due to higher core clock)
- Texel fillrate of 5.6 gigatexels/sec (5.6 = 4*1.4, so Parhelia indeed processes 4 textures per pass)


The multi-texture fillrate is at least double that of the GF4 while the single-texture fillrate will differ by the clock speed between Parhelia and GF4. The vertex processing power is also at least double that of the GF4 since it has twice the vertex pipes. The AA looks to me looks like strictly MSAA with (many) more samples.

The lack of PS 2.0 support doesn't really dissapoint me. I mean, we are not seeing barely any games using pixel shaders at all and even Doom3, UT2 and others are going to cater to the DX8 market and thus (probably) see no benefit from PS2.0. I wonder if Matrox now has their own OGL extensions for Carmack to code a third path with

Could anybody care to explain what an "8 Way Parallel DMA Engine" means? Could this mean that the Parhelia memory controller can fetch 8 64bit chunks of memory (ie. 8-way memory controller)? VS 2.0 support is nice, FSAA is nice, but an 8-way mem controller for a 512 bit bus would be the greatest feature of this graphics chip to me.

-Toasty

[otlg22]

To me the 8 way parallel DMA engine says it can preform 8 load/store type ops per clock.. Probably split 4 and 4, although it may be fully flexible (5/3, 2/6, whatever is needed)..although my gut says 4 in and 4 out per clock..

[TdB]

from james crowson´s translation:

So, in comparison with the previous generation of accelerators, the carrying strip of local videomemory twice will increase. But speed not main конек products from Matrox. Marvellously, chip Parhelia-512 is not equipped with any technologies of economy of a carrying strip of memory. This fact is surprising - similar technologies are present at all last products from ATI and NVIDIA, but probably Matrox has decided to speed up and reduce the price of development of the chip being for them faster a symbol, than attempt to win the market.

i read this as: "we are not focusing on speed and wanted the card out ASAP, and wanted to reduce develoment-cost, so we didn´t bother to develop any bandwith-saving tech, we just want to show the high-end market that we are still alive".

[TdB]

Originally posted by otlg22
To me the 8 way parallel DMA engine says it can preform 8 load/store type ops per clock.. Probably split 4 and 4, although it may be fully flexible (5/3, 2/6, whatever is needed)..although my gut says 4 in and 4 out per clock..

sounds like 4 old-fashion g400-style dual-busses to me.

[Jazzz]

I would of liked the card to be fully DirectX 9 card like the R1000 and nv30 are. Seeing that Nvidia release a card every 6 months and ATI 9 months they can afford to leave DirectX 9 features out until their next release, Im not sure after how long Matrox will release their next card though.